SiC-on-Insulator Film Market Size, Share, Growth and Forecast, 2025-2035

Engineered SiC film substrates grow nearly sevenfold by 2035

The SiC-on-insulator film market was valued at USD 28.9 million in 2025 and is projected to increase from USD 31.9 million in 2026 to USD 196.4 million by 2035, registering a CAGR of 21.12% during 2025–2035. Demand comes from power-device makers that buy layer-transferred substrates to cut SiC crystal use and on-resistance, and from photonics, quantum and MEMS laboratories that need SiC films on oxide for waveguides, resonators and harsh-environment sensors. Asia Pacific held the largest regional share, 44.6% in 2025, because Japanese and Chinese device makers run the most SiC lines. The key commercial change is qualification, as Diodes Incorporated validated 150 mm SmartSiC substrates for 650V diodes and 1200V MOSFETs in November 2025, while the move to 200 mm wafers is under way. The market remains a specialist substrate niche worth tens of millions of dollars, not yet a mass-market EV component.

Which bonded SiC substrates count, and which do not?

The scope covers engineered substrates in which a thin monocrystalline SiC film, usually 4H or 3C polytype, sits on a different handle wafer and is joined to it through a bonding or insulating layer. It includes layer-transferred SiC on a polycrystalline SiC handle for diodes and MOSFETs, SiC films on silicon dioxide or sapphire for photonic and quantum chips, SiC device layers on oxide for MEMS, and SiC films on insulating handles for RF and high-temperature circuits.

Bulk SiC wafers and SiC epitaxy sold on their own are excluded, as are silicon-on-insulator, piezoelectric-on-insulator and GaN-on-SiC substrates, even when the same Smart Cut lines make them. Amorphous or polycrystalline SiC coatings without a transferred crystal film are also excluded.

Power substrates on 150 mm lead as photonics and 200 mm grow

Power substrates lead by application as photonic and quantum films grow fastest

Based on application, the market is categorized into power devices, photonics and quantum, MEMS and sensors, and RF and high-temperature electronics. Power devices led with 64.2% of 2025 value, as SmartSiC and SiCkrest wafers ship in production volumes for diodes and MOSFETs. Photonics and quantum grows fastest at 30.00% a year, because SiC films on oxide carry low-loss waveguides, frequency combs and spin-defect qubits, which favors suppliers that control film thickness tightly.

150 mm wafers lead by wafer size while 200 mm wafers grow fastest

Based on wafer size, the market is categorized into 100 mm and below, 150 mm and 200 mm. Wafers of 150 mm led with 63.8% of 2025 value, because they match the SiC power lines that buy most engineered substrates today. The 200 mm size grows fastest at 34.00% a year as device makers move SiC production to larger wafers, which favors suppliers with 200 mm bonding pilot lines and crystal partners.

Donor reuse, lower resistance and photonics drive SiC films

Layer transfer lets one costly SiC donor wafer serve several substrates

Single-crystal SiC is slow and costly to grow, and most of a bulk wafer's thickness does nothing electrically. Layer transfer splits off a film less than 1 micron thick and bonds it to a cheaper polySiC handle, so the donor can be reused several times. As a result, power-device makers in Europe and Asia gain most when bulk SiC is scarce. Reclaim services refurbish each donor between transfers, which spreads the cost of one crystal over several engineered substrates, and the effect runs through the 2025–2035 period.

Lower on-resistance gives device makers a performance case

A low-resistivity handle cuts the substrate's share of on-resistance in vertical power devices. In November 2025, Diodes Incorporated validated Soitec's 150 mm SmartSiC substrates for 650V Schottky diodes and 1200V MOSFETs and reported lower on-resistance, while Clas-SiC Wafer Fab added SmartSiC to its 1200V MOSFET design kit. Power devices are already the largest application, and each validation of this kind adds a recurring buyer in EV inverters, chargers and solar converters.

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Publicly funded photonic research builds a SiC-on-oxide user base

SiC is transparent from the visible to the mid-infrared, shows strong optical nonlinearity and hosts color centers that act as spin qubits. In August 2025, DTU announced the SiCPIC doctoral network, which links it with 12 partner universities, institutes and companies to develop low-loss SiC-on-insulator stacks. Photonics and quantum is therefore the fastest-growing application, a medium-term driver concentrated in European and U.S. laboratories that build low-loss waveguides, frequency combs and qubits for photonic chips.

CHIPS funding expands the SiC crystal base behind donor wafers

In October 2024, the U.S. Department of Commerce signed preliminary terms with Wolfspeed for up to $750 million in proposed CHIPS Act funding for a 2-million-square-foot SiC wafer plant in Siler City, North Carolina, described as the world's first high-volume 200 mm SiC wafer facility. In Europe, the WBG Pilot Line pools SiC and GaN tools in seven countries. More crystal capacity secures donor wafers for a decade of reuse cycles in North America and Europe, which matters because buyers need confidence in donor supply before they qualify engineered substrates.

200 mm wafers, second sources and pilot lines reshape supply

Engineered SiC substrates shift from 150 mm to 200 mm

In September 2024, Soitec and Resonac signed a joint development agreement for 200 mm SmartSiC wafers on Resonac substrates and epitaxy, and in May 2025 Soitec reported completion of its 200 mm SmartSiC pilot line in Bernin. Larger wafers cut cost per die for device makers moving SiC lines to 200 mm. The 200 mm size grows fastest at 34.00% a year, and it is likely to pass the 100 mm and below group in share before 2035.

Buyers increasingly insist on second and third sources

For years, Sumitomo Metal Mining's SICOXS was the only volume source of bonded SiC on a polySiC handle. Soitec's SmartSiC gave device makers a second source, and Resonac's 200 mm work points to a third route through a Japanese crystal grower. In March 2026, Soitec and NSIG signed a 10-year extension of their licensing framework, which keeps a Chinese route to Smart Cut open. Automotive buyers want 2 qualified sources before committing high-volume parts.

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Spin defects open a quantum hardware opportunity for SiC films

Divacancies and silicon vacancies in 4H-SiC emit light near telecom wavelengths and keep spin coherence in an industrial material. Thin 4H films on oxide let groups build cavities and waveguides around those defects at wafer scale rather than in hand-made membranes. Photonics and quantum already holds the fastest growth by application, and a first commercial quantum-network product built on SiC would add a repeat buyer for 100 mm and 150 mm wafers.

Shared pilot lines open an opportunity for SiC prototyping at smaller firms

In June 2026, WBG Pilot Line partners met at Fraunhofer IISB to prepare third-party access to tools in Italy, Poland, Sweden, Finland, France, Austria and Germany. Start-ups and small firms that cannot afford their own bonding and thinning equipment will be able to prototype SiC devices on shared lines, adding wafer buyers. Harsh-environment sensor makers that already serve the MEMS market with silicon-on-insulator can add SiC as a premium grade.

Cheap bulk SiC, the EV cycle and implant damage limit growth

Cheaper bulk SiC weakens the cost case for layer transfer

The cost argument for layer transfer rests on bulk SiC being scarce. New crystal capacity in China and elsewhere has pushed bulk SiC wafer prices down sharply, so a device maker now needs a performance reason, not only a cost reason, to pay for an engineered substrate, and power-device buyers are most affected. Suppliers mitigate by proving lower on-resistance and better yield in qualification data, as in the 2025 Diodes study, and by moving to 200 mm.

An EV inventory cycle delays power-substrate orders

Most power-device substrates go into traction inverters, so demand follows the EV cycle. Soitec told investors in May 2025 that the SmartSiC ramp was delayed by slower EV growth, and in May 2026 it booked an impairment on SmartSiC assets as its Automotive and Industrial division fell 44% at constant exchange rates. WSTS forecasts discrete semiconductors to grow only 8% in 2026, so suppliers mitigate by widening into photonic and MEMS grades.

Restructuring at a major crystal grower tests donor supply

Wolfspeed, a large source of SiC crystal, went through Chapter 11, and a U.S. court confirmed its reorganization plan on Sept. 8, 2025, cutting its debt by about 70%. Engineered-substrate buyers need confidence that donor wafers will be available for a decade of reuse cycles, so supply stress lengthens qualification. Layer-transfer suppliers and their device customers mitigate by qualifying donor wafers from more than 1 grower, including Japanese and Chinese crystal makers.

Implant damage and thickness variation limit photonic wafers

Ion implantation, used to split the film, leaves lattice damage that raises optical loss. Grinding and polishing thick bonded wafers avoids implant damage but leaves thickness variation across the wafer. Both limits keep photonic SiC-on-oxide wafers small, mostly 100 mm and below, and expensive per unit area. Laboratories and photonic start-ups bear the cost and wait longer for wafers, and suppliers mitigate with post-split annealing, hybrid silicon-on-SiC stacks and tighter thinning control.

Asian power fabs lead demand as Bernin lines lead supply

Asia Pacific leads demand on Japanese and Chinese SiC lines

Asia Pacific held 44.6% of 2025 value and grows at 22.83% a year, the fastest of the five regions. Japan anchors demand through SICOXS, Resonac and power-device makers testing bonded SiC, while China adds a large base of SiC power fabs and university photonics groups. The March 2026 Soitec and NSIG licensing renewal, running 10 years, gives Chinese producers a route to Smart Cut capacity. Each Asian power fab that qualifies an engineered substrate adds a large recurring order.

Europe relies on Bernin production and research networks to anchor demand

Europe held 27.8% of 2025 value and grows at 18.20% a year. Soitec makes SmartSiC in Bernin, France, where it completed a 200 mm pilot line, and European power-device makers and pilot lines consume a large part of that output. The SiCPIC network with 12 partners and the WBG Pilot Line, with facilities in seven countries, add steady demand for SiC-on-oxide research wafers. Slower European EV demand is the main drag on regional growth.

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North America splits demand among power, defense and quantum groups

North America held 24.1% of 2025 value and grows at 21.40% a year. Demand comes from U.S. power-device makers, defense and space electronics, and quantum and photonics groups at universities and national laboratories. Proposed CHIPS support of up to $750 million for Wolfspeed's Siler City plant strengthens domestic donor supply. RF and high-temperature circuits for engine control and drilling also use insulating layers to isolate devices, much as silicon-on-insulator does for silicon chips.

Middle East & Africa and Latin America remain small research buyers

The Middle East & Africa held 2.2% of 2025 value and grows at 16.50% a year, led by research buyers in Israel and the Gulf and a small base of power-electronics assembly. Latin America held 1.3% and grows at 14.80% a year, as university groups in Brazil and Mexico buy small research wafers without local SiC device production at scale.

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Diodes validation, Wolfspeed and NSIG news mark 2024–2026

Smart Cut, bond-and-thin films and spin-defect cavities

• Smart Cut splitting uses hydrogen implantation to split a sub-micron SiC film from a donor that returns to the cycle, the basis of power substrates.
• Bond and thin processing, which grinds and polishes a bonded wafer, avoids implant damage and suits photonics, but thickness uniformity remains the limit.
• Hybrid stacks made by bonding silicon onto SiC let groups pattern only the easier layer, and an NSF-supported study reached quality factors above 100,000 in ring resonators.
• Spin-defect cavities built at wafer scale around divacancies and silicon vacancies in 4H-SiC film could move quantum memories from lab to foundry.

Two layer-transfer specialists lead a concentrated field

Supply sits with three groups, starting with layer-transfer specialists that own the bonding, splitting and polishing know-how. Soitec makes SmartSiC with its Smart Cut process in Bernin, while Sumitomo Metal Mining, through SICOXS, makes SiCkrest bonded substrates and was for years the only volume source, and NSIG holds a Smart Cut licensing framework with Soitec. SiC crystal growers such as Resonac and Wolfspeed supply donor wafers and partner on development, and integrated device makers such as onsemi and STMicroelectronics are potential buyers or partners. Research wafer houses such as UniversityWafer sell small runs of SiC-on-oxide to laboratories. Credence Research estimates that the two leading layer-transfer suppliers hold well over half of 2025 value, almost all of it in power substrates, while the photonic and MEMS segment is fragmented and custom, although concentration should fall as Chinese capacity enters.

Substrate makers, crystal partners and validating device makers

Device qualifications, not EV headlines, decide demand

Credence Research's view is that SiC-on-insulator film is a qualification-stage substrate business in which each device-maker approval matters more than any EV headline. Power substrates will carry most of the value through 2030, while photonic and quantum films supply the fastest growth. Suppliers that pair 200 mm bonding capacity with secure donor supply and proven on-resistance gains are best positioned. The main risk is cheaper bulk SiC eroding the cost case, so investors should watch new power-device qualifications, 200 mm production starts and the first commercial SiC quantum products.

Wafer counts, prices and supplier data behind the estimate

The report uses 2025 as the base year and forecasts to 2035, with CAGR calculated over 2025–2035. Market values come from Credence Research's market model, built from estimated engineered wafer shipments and average selling prices by application and wafer size; application, wafer-size and regional splits are Credence Research estimates. The model was checked against supplier disclosures, device-maker validation announcements, government funding notices and public research program information, although shipment counts are not published, which limits precision.

200 mm power wafers and photonic runs lift volume to 2035

Through 2035, engineered SiC substrates will move from pilot qualification to repeat production in power devices, with 200 mm wafers taking a rising share. Photonic and quantum films will grow fastest as shared pilot lines and research networks turn laboratory wafers into foundry runs, and Asia Pacific remains the largest and fastest-growing region. Investment will flow to 200 mm bonding lines, donor reclaim and thinner, lower-loss films. The pace depends on bulk SiC prices, the EV cycle and how quickly device makers qualify second sources.

Note: The depth of individual sections depends on data availability for this market. Volume, capacity, trade and other unit-based metrics are included where applicable.